IIT Madras Begins Registrations for Symposium on ‘Future of India's Electronics and Computers

IIT Madras and IIT-M Pravartak Technologies Foundation are inviting students, industry experts, and researchers to register for the 'Digital India RISC-V' Symposium, a one-day event highlighting 'The Future of Electronics in India through the RISC-V Pathway.' It will be placed on August 6, 2023, at the IIT Madras Research Park in Taramani, Chennai.
RISC refers to Reduced Instruction Set Computer, as opposed to CISC, which stands for Complex Instruction Set Computer, and V stands for the fifth generation. In a press release, IIT Madras stated that it is eager to have a large number of students, teachers, and working professionals participating in RISC-V designs.

Shri Rajeev Chandrasekhar, Hon'ble Minister of State in the Ministries of Electronics and Information Technology and Skill Development and Entrepreneurship, Government of India, and Prof. V. Kamakoti, Director, IIT Madras, who developed 'SHAKTI,' India's first indigenously-designed microprocessor based on RISC-V ISA, are among the eminent dignitaries scheduled to speak at the event.

Registration for the symposium is free and open to the public, with a limited number of seats available. Participants who are interested in attending the symposium should register at pravartak.org.in/dirv_tech_confluence_registration. Students, industry experts, and researchers interested in Reduced Instruction Set Computer (RISC) V designs are invited to attend the symposium. Participants will receive insights into India's burgeoning RISC-V ecosystem as well as the latest advances and trends in processor design and innovation through open standard collaboration.